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PIC24FJ256GB106-I/PT

MCU 16-bit PIC24 PIC RISC 256KB Flash 2.5V/3.3V 64-Pin TQFP

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PIC24FJ256GB106-I/PT

MCU 16-bit PIC24 PIC RISC 256KB Flash 2.5V/3.3V 64-Pin TQFP

Los pedidos superiores a $200 son elegibles para un regalo de estilo chino de edición limitada.

Los pedidos superiores a $200 son elegibles para un regalo de estilo chino de edición limitada.

Los pedidos superiores a $1000 califican para una exención de tarifa de envío de $30.

Los pedidos que superen los $5000 disfrutan de la exención de tarifas de envío y transacción.

Estas ofertas son aplicables tanto a clientes nuevos como existentes y son válidas desde el 1 de enero de 2024 hasta el 31 de diciembre de 2024..

  • Fabricante:

    Microchip

  • Ficha de datos:

    PIC24FJ256GB106-I/PT datasheet

  • Paquete/Estuche:

    TQFP-64

  • categoria de producto:

    Circuitos integrados de RF

  • RoHS Status:

Envíe su solicitud de cotización ahora y esperamos brindarle una cotización dentro de abril 28, 2024. Realice su pedido ahora y esperamos completar la transacción dentro de mayo 01, 2024. Ps: La hora es según GMT+8:00.

Entrega:
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Pago :
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Existencias:2000 PCS

Nuestro compromiso es entregar cotizaciones rápidas dentro de las 12 horas. Para obtener más ayuda, por favor contáctenos en sales@censtry.com.

PIC24FJ256GB106-I/PT Detalles de producto

Power Management:

● On-Chip 2.5V Voltage Regulator

● Switch between Clock Sources in Real Time

● Idle, Sleep and Doze modes with Fast Wake-up and Two Speed Start-up

● Run mode: 1 mAMIPS, 2.0V Typical

● Sleep mode Current Down to 100 nA Typical

● Standby Current with 32 kHz Ocillator: 2.5 μA, 2.0V typical

Universal Serial Bus Features:

● USB v2.0 On-The-Go (OTG) Compliant

● Dual Role Capable - can act as either Host or Peripheral

● Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s) USB Operation in Host mode

● Full-Speed USB Operation in Device mode

● High-Precision PLL for USB

● Intemnal Voltage Boost Assist for USB Bus Voltage Generation

● Interface for Off-Chip Charge Pump for USB Bus Voltage Generation

● Supports up to 32 Endpoints (16 bidirectinal):

   - USB Module can use any RAM location on the device as USB endpoint buffers

● On-Chip USB Transceiver with On-Chip Voltage Regulator

● Interface for 0ff-Chip USB Transceiver

● Supports Control, Interrupt, lsochronous and Bulk Transfers

● On-Chip Pul-up and Pul-Down Resistors

High-Performance CPU:

● Modified Harvard Architecture

● Up to 16 MIPS Operation at 32 MHz

● 8 MHz Internal Ocillator

● 17-Bit x 17-Bit Single-Cycle Hardware Mutiplier

● 32-Bit by 16-Bit Hardware Divider

● 16 x 16-Bit Working Register Array

● C Compiler Optimized Instruction Set Architecture with Flexible Addressing modes

● Linear Program Memory Addressing, Up to 12 Mbytes

● Linear Data Memory Addressing, Up to 64 Kbytes

● Two Address Generation Units for Separate Read and Write Addressing of Data Memory

Analog Features:

● 10-Bit, Up to 16-Channel Analog-to-Digital (AD) Converter at 500 ksps:

   Conversions available in Sleep mode

● Three Analog Comparators with Programmable Input/ Output Configuration

● Charge Time Measurement Unit (CTMU)

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